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A Compression Algorithm Design and Simulation for Processing Large Volumes of Data from Wireless Sensor Networks

Priyanka Vangali, Xiaokun Yang. Published in Wireless.

Communications on Applied Electronics
Year of Publication: 2017
Publisher: Foundation of Computer Science (FCS), NY, USA
Authors: Priyanka Vangali, Xiaokun Yang

Priyanka Vangali and Xiaokun Yang. A Compression Algorithm Design and Simulation for Processing Large Volumes of Data from Wireless Sensor Networks. Communications on Applied Electronics 7(4):1-5, July 2017. BibTeX

	author = {Priyanka Vangali and Xiaokun Yang},
	title = {A Compression Algorithm Design and Simulation for Processing Large Volumes of Data from Wireless Sensor Networks},
	journal = {Communications on Applied Electronics},
	issue_date = {July 2017},
	volume = {7},
	number = {4},
	month = {Jul},
	year = {2017},
	issn = {2394-4714},
	pages = {1-5},
	numpages = {5},
	url = {},
	doi = {10.5120/cae2017652650},
	publisher = {Foundation of Computer Science (FCS), NY, USA},
	address = {New York, USA}


As Internet of things (IoT) advances, the growth in data volume from wireless sensor networks (WSNs) is explosive and is likely to overwhelm traditional datacenters. Therefore this paper presents a field-programmable gate array (FPGA) design and simulation on a data compression algorithm as a case study. By collecting and compressing raw data from IoT network, the large amount of sensor data is dramatically reduced and translated into valuable information to the servers. Simulation results show that the compression ratio can reach 30.08% with a very low processing latency (20 ms for compressing 1 KB sensor data).


  1. X. Liu, J. Zhou, C. Wang, etc. “An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing”, IEEE Trans. on Circuits and Systems-II: Express Briefs, Vol. 62, No. 12, PP. 1149 - 1153, Aug. 2015
  2. M. Fan, Q. Han, and X. Yang, “Energy Minimization for On-Line Real-Time Scheduling with Reliability Awareness”, Journal of Syst. and Software, Vol. 127, PP. 168-176, May 2017.
  3. H. P. Medeiros, M. Maciel, R. Souza, and M. Pellenz “Lightweight Data Compression in Wireless Sensor Networks Using Huffman Coding”, Intl. Journal of Distributed Sensor Networks, PP. 1550-1477, Jan. 2014.
  4. E. Capo-Chichi, H. Gyennet, and J. Friedt, “K-RLE : A new Data Compression Algorithm for Wireless Sensor Network”, 2009 3rd Intl. Conference on Sensor Technologies and Applications (SENSORCOMM2009), PP. 502– 507, Aug. 2009
  5. M. Yuanbin, Q. yubing, L.Jizhong, L.Yanxia “A Data Compression Algorithm Based On Adaptive Huffman Code for Wireless Sensor Networks”, 2011 4th Intl. Conference on Intelligent Computation Technology and Automation (ICICTA2011), April 2011
  6. B. Ying, “An Energy-Efficient Compression Algorithm for Spatial Data in Wireless Sensor Networks”, 2016 18th Intl. Conference on dvanced Communication Technology (ICACT2016), PP. 515–426, March 2016
  7. X. Yang and J. Andrian, “A High Performance On-Chip Bus (SBUS) Design and Verification”, IEEE Trans. Very Large Scale Integr. (TVLSI) Syst., vol. 23, no. 7, pp. 1350–1354, July 2014.
  8. X. Yang andW.Wen, “Design of A Pre-Scheduled Data Bus for Advanced Encryption Standard Encrypted System-on- Chips”, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC2017), pp. 506-511, Jan. 2017.
  9. T. Schoellhammer, B. Greenstein, E. Osterweil, M. Wimbrow, and D. Estrin, “Lightweight Temporal Compression of Microclimate Datasets”, 2004. 29th Annual IEEE Intl. Conference on Local Computer Networks, PP. 515–426, Dec. 2004.
  10. Y. Liang and N. Erratt “Compressed Data – Stream Protocol: An Energy Efficient Compressed Data – Stream Protocol for Wireless Sensor Networks”, 2011 IET Communications, Vol. 5, No. 18, PP. 2673 – 2683, Dec. 2011.
  11. R. Sharma, “A Data Compression Applications for Wireless Sensor Networks Using LTC Algorithmic”, 2015 IEEE Intl. Conference on Electro/Information Technology (EIT), PP. 598–604, Oct. 2015.
  12. K. Compton and S. Hauck “Automatic Design of Reconfigurable Domain-Specific Flexible Cores”, IEEE Trans. Very Large Scale Integr. Syst. (TVLSI), Vol. 16, No. 5, PP. 493- 503, May 2008.
  13. D. Chen, J. Cong, S. Gurumani, etc. “Platform Choices and Design Demands for IoT Platforms: Cost, Power, and Performance Tradeoffs”, IET Journals, Vol. 1, No. 1, PP. 70–77, Dec. 2016.
  14. I. Beretta, V. Rana, D. Atienza, and D. Sciuto “A Mapping Flow for Dynamically Reconfigurable Multi-Core Systemon- Chip Design”, IEEE Trans. Comput.-Aided Design Integr. Circuits Syst. (TCAD), Vol. 30, No. 8, PP. 1211-1224, Aug. 2011
  15. X. Yang, N. Wu, and J. H. Andrian, “A novel bus transfer mode (AS Transfer) and a performance evaluation methodology”, Integration, the VLSI Journal, vol. 52, pp. 23–33, Jan. 2016.


Data compression, Field-programmable gate array (FPGA), Internet of things (IoT), Wireless Sensor Networks (WSNs)