CFP last date
01 January 2025
Call for Paper
February Edition
CAE solicits high quality original research papers for the upcoming February edition of the journal. The last date of research paper submission is 01 January 2025

Submit your paper
Know more
The week's pick
Responsive image
Property (Land) Registration Management Using Blockchain in Nigeria

A. Festus Osuolale Ojebiyi David-Daniel Seriki Oluwasogo
Random Articles
Reseach Article

Synthesis of Peres and R Logic Circuits in Nanoscopic Scale

by Md. Abdullah-Al-Shafi
journal cover thumbnail

Communications on Applied Electronics
Foundation of Computer Science (FCS), NY, USA
Volume 4 - Number 1
Year of Publication: 2016
Authors: Md. Abdullah-Al-Shafi
10.5120/cae2016652004

Md. Abdullah-Al-Shafi . Synthesis of Peres and R Logic Circuits in Nanoscopic Scale. Communications on Applied Electronics. 4, 1 ( January 2016), 20-25. DOI=10.5120/cae2016652004

@article{ 10.5120/cae2016652004,
author = { Md. Abdullah-Al-Shafi },
title = { Synthesis of Peres and R Logic Circuits in Nanoscopic Scale },
journal = { Communications on Applied Electronics },
issue_date = { January 2016 },
volume = { 4 },
number = { 1 },
month = { January },
year = { 2016 },
issn = { 2394-4714 },
pages = { 20-25 },
numpages = {9},
url = { https://www.caeaccess.org/archives/volume4/number1/494-2016652004/ },
doi = { 10.5120/cae2016652004 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2023-09-04T19:53:57.576784+05:30
%A Md. Abdullah-Al-Shafi
%T Synthesis of Peres and R Logic Circuits in Nanoscopic Scale
%J Communications on Applied Electronics
%@ 2394-4714
%V 4
%N 1
%P 20-25
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Traditional lithography based VLSI architecture expanded to optimize higher scale integration and low powered computing of semiconductor components. This tend encounter severe challenges of short channel issue, tunneling and variation of doping. Quantum Dot Cellular Automata (QCA) is an esteemed nano-scale technology and a better substitute of Complementary Metal Oxide Semiconductor (CMOS) for it’s transformation technique and computation method. Information-lossless or reversible logic circuits has divers precise utilization in communications, digital signal processing (DSP), computer graphics also in quantum computation. This paper presents the systematic model of Peres gate (PG) and R gate in QCA and CMOS. To simulate and verify the proposed design QCADesigner and Microwindlite, widely used simulation tools are used. Those proposed design has a promising future and can be used in modeling complex computing structure and nano-scale based low power consumption information processing structure.

References
  1. Antonelli, D. A. et al, June 2004. Quantum-dot cellular automata (QCA) circuit partitioning: problem modeling and solutions. In Proceedings of the 41st annual Design Automation Conference, ACM, pp. 363-368.
  2. C. S. Lent, P. D. Tougaw and W. Porod "Quantum Cellular Automata: The physics of computing with quantum dot molecules", Physics and Computation, pp. 5–13, 17-20 Nov 1994.
  3. C. S. Lent and P.D. Tougaw "Device architecture for computing with quantum dots", Proceedings of the IEEE. Vol.85, pp.541–557, 1997
  4. H. Cho and E. E. Swartzlander "Adder and multiplier design in quantum-dot cellular automata", IEEE Transactions on Computers, Vol.58, No. 6, pp. 721-727, 2009.
  5. Al-Rabadi, Anas N "Reversible logic synthesis: From fundamentals to quantum computing", Springer, 2004.
  6. Thapliyal, H. and Ranganathan, N. 2008. Testable reversible latches for molecular QCA, In Nanotechnology, NANO '08. 8th IEEE Conference, pp. 699-702.
  7. X. Ma, J. Huang, C. Metra and F. Lombardi "Reversible gates and testability of one dimensional arrays of molecular QCA", J. Electronic Testing, Vol. 24, 297-311, 2008.
  8. H. Thapliyal and N. Ranganathan "Reversible logic-based concurrently testable latches for molecular QCA", Nanotechnology, IEEE Transactions on, Vol. 9, pp. 62-69, 2010.
  9. R. Landauer "Irreversibility and Heat Generation in the Computational Process", IBM Journal of Research and Development, Vol. 5, No. 3, pp. 183-191, 1961.
  10. C.H. Bennett "Logical Reversibility of Computation", IBM J. Research and Development, Vol 17, No. 6, pp. 525-532, 1973.
  11. M. Nielsen and I. Chuang, "Quantum Computation Quantum Information", Cambridge, U.K. Cambridge Univ. Press, 2000.
  12. R. P. Feynman "Quantum mechanical computers", Foundations of physics, Vol. 16, No. 6, pp. 507-531, 1986.
  13. T. Toffoli "Reversible computing", Springer Berlin Heidelberg, pp. 632-644, 1980.
  14. Fredkin, Edward and T. Toffoli "Conservative logic", Springer London, pp. 47-81, 2002.
  15. M. Haghparast and K. Navi "A novel fault tolerant reversible gate for nanotechnology based systems", American Journal of Applied Sciences, Vol. 5, No, 5, pp. 519, 2008.
  16. A. N. Bahar, M. Habib and N. K. Biswas "A Novel Presentation of Toffoli Gate in Quantum-dot Cellular Automata (QCA)", International Journal of Computer Applications, Vol. 82, No. 10, pp. 1-4, 2013.
  17. A. N. Bahar, S. Waheed, M. A. Uddin and M.A. Habib "Double Feynman Gate (F2G) in Quantum dot Cellular Automata (QCA)", International Journal of Computer Science Engineering (IJCSE), Vol. 2, No. 6, pp. 351-355, 2013.
  18. M.A. Shafi, M.S. Islam and A.N. Bahar "A Review on Reversible Logic Gates and it’s QCA Implementation", International J of Computer Applications (IJCA), Vol. 128, No. 2, pp. 27-34, 2015.
  19. B. Meurer, D. Heitmann and K. Ploog "Excitation of three dimensional quantum dots", Physical Review, Vol. 68, pp. 1371, 1992.
  20. I. Amlani, A. Orlov, G. Toth, G. H. Bernstein, C. S. Lent and G. L. Snider "Digital Logic Gate Using Quantum-dot Cellular Automata", Science, Vol. 284, No. 5412, pp. 289-291, 1999.
  21. A. Peres "Reversible logic and quantum computers", Physical review A, Vol. 32, No. 6, pp. 3266, 1985.
  22. D. P. Vasudevan, P.K. Lala, J. Di and J.P. Parkerson "Reversible-logic design with online testability", Instrum Meas IEEE Trans Vol. 55, No. 2, pp. 406–414, 2006.
  23. K. Walus, T. J. Dysart, G. A. Jullien and R. A. Budiman "QCADesigner: A rapid design and simulation tool for quantum-dot cellular automata", Transactions on Nanotechnology, IEEE Vol. 3, No. 1, pp. 26-31, 2004.
  24. "QCADesigner" http://www.mina.ubc.ca/qcadesigner [Online; Accessed: 25 October-2015].
  25. A. Sarker, A. N. Bahar, P. K. Biswas and M. Morshed "A novel presentation of peres gate (pg) in quantum-dot cellular automata (QCA)", European Scientific Journal, Vol. 10, No. 21, pp. 101-106, 2014.
  26. A. N. Bahar, S. Waheed and N. Hossain "A new approach of presenting reversible logic gate in nanoscale", SpringerPlus, Vol. 4, No.153, 2015.
  27. R. J. Baker "CMOS: circuit design, layout and simulation", John Wiley and Sons, Vol. 18, 2011.
Index Terms

Computer Science
Information Sciences

Keywords

QCA Peres gate R gate QCADesigner MICROWIND.

Powered by PhDFocusTM