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Insights of Performance Enhancement Techniques on FinFET-based SRAM Cells

Girish H., Shashikumar D. R.. Published in Circuits and Systems.

Communications on Applied Electronics
Year of Publication: 2016
Publisher: Foundation of Computer Science (FCS), NY, USA
Authors: Girish H., Shashikumar D. R.
10.5120/cae2016652312

Girish H. and Shashikumar D R.. Insights of Performance Enhancement Techniques on FinFET-based SRAM Cells. Communications on Applied Electronics 5(6):20-26, July 2016. BibTeX

@article{10.5120/cae2016652312,
	author = {Girish H. and Shashikumar D. R.},
	title = {Insights of Performance Enhancement Techniques on FinFET-based SRAM Cells},
	journal = {Communications on Applied Electronics},
	issue_date = {July 2016},
	volume = {5},
	number = {6},
	month = {Jul},
	year = {2016},
	issn = {2394-4714},
	pages = {20-26},
	numpages = {7},
	url = {http://www.caeaccess.org/archives/volume5/number6/626-2016652312},
	doi = {10.5120/cae2016652312},
	publisher = {Foundation of Computer Science (FCS), NY, USA},
	address = {New York, USA}
}

Abstract

With the advancement in the energy efficient storage system, FinFET has already gained a pace in the area of computational memory management. However, after reviewing the research work focusing on FinFET based SRAM cells till date, we found that amount of research work towards enhancement of the design principle has not been much in number. Hence, we study some of the recently introduced research contribution towards enhancing the design performance of FinFET based SRAM cells and found that majority of the technique have both advantages and limitations too. We also highlights the significant research gap from the existing studies in order to assist the readers aware of the practicality of the research progress in this regards.

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Keywords

FinFET, SRAM, Leakage Power, Energy Efficiency, CMOS, MOSFET