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Design of Conventional and Modified Router Design for NOC and its FPGA Implementation

Manjunatha S.. Published in Wireless.

Communications on Applied Electronics
Year of Publication: 2018
Publisher: Foundation of Computer Science (FCS), NY, USA
Authors: Manjunatha S.
10.5120/cae2018652775

Manjunatha S.. Design of Conventional and Modified Router Design for NOC and its FPGA Implementation. Communications on Applied Electronics 7(18):1-5, July 2018. BibTeX

@article{10.5120/cae2018652775,
	author = {Manjunatha S.},
	title = {Design of Conventional and Modified Router Design for NOC and its FPGA Implementation},
	journal = {Communications on Applied Electronics},
	issue_date = {July 2018},
	volume = {7},
	number = {18},
	month = {Jul},
	year = {2018},
	issn = {2394-4714},
	pages = {1-5},
	numpages = {5},
	url = {http://www.caeaccess.org/archives/volume7/number18/820-2018652775},
	doi = {10.5120/cae2018652775},
	publisher = {Foundation of Computer Science (FCS), NY, USA},
	address = {New York, USA}
}

Abstract

FPGA Based Systems are helpful improves the performance metrics with high throughput for SOC and NOC Based designs. NOC is an integration of complex-network system into single-device or a chip. This reduces the manufacturing cost of SOC, increases the performance and reduces the time-consumption. In this paper, two different types of NOC Designs are synthesized and implemented. Firstly, Conventional NOC 2X2 Router includes the 5-channels namely, local, east, north, south and north. Each channel is having 2 Multiplexors along with cross bar switch. Secondly, Proposed NOC 2X2 Router includes 4 Nodes and each Node is having the priority encoder, Random arbiter and router design using XY Algorithms. The proposed designs executing in Xilinx 14.7 and simulated using Modelsim. The outcome of executed scheme gives detailed results with their input and output. The system design is synthesized in Xilinx 14.7 ISE using Verilog and simulated in Modelsim 6.3f and these implemented on FPGA board of version Artix 7. The performance analysis of Proposed NOC 2X2 Router over Conventional NOC 2X2 Router is improves the area overhead and it is tabulated.

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Keywords

System on chip (SoC), Network on Chip (NoC), Router, FPGA