The week's pick
Reseach Article
A 3-Bit 10-MSps Low Power CMOS Flash ADC
| Communications on Applied Electronics |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 7 - Number 22 |
| Year of Publication: 2018 |
| Authors: Andrew Selasi Agbemenu, Ernest Ofosu Addo, Benjamin Kommey |
10.5120/cae2018652796
|
Andrew Selasi Agbemenu, Ernest Ofosu Addo, Benjamin Kommey . A 3-Bit 10-MSps Low Power CMOS Flash ADC. Communications on Applied Electronics. 7, 22 ( Nov 2018), 21-26. DOI=10.5120/cae2018652796
Abstract
Flash ADCs employ multiple comparator circuits to introduce parallelism in data conversion. Having their speed limited only by transistor gate and comparator propagation delay, flash converters have the fastest signal conversion speeds amongst all ADC architecture implementations. This paper details the design of a low power 3-bit flash ADC with a 3V supply realised in 0.6 micron CMOS technology. The designed ADC exhibits a voltage resolution of 34.13 mV and draws 23.88 mW power at 2.17 MHz.
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