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FPGA Implementation of Forgy’s K-Means Clustering for Real Time Image Analysis

by Anuradha M. G. Basavaraj L.
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Communications on Applied Electronics
Foundation of Computer Science (FCS), NY, USA
Volume 7 - Number 30
Year of Publication: 2019
Authors: Anuradha M. G. Basavaraj L.
10.5120/cae2019652832

Anuradha M. G. Basavaraj L. . FPGA Implementation of Forgy’s K-Means Clustering for Real Time Image Analysis. Communications on Applied Electronics. 7, 30 ( Aug 2019), 5-10. DOI=10.5120/cae2019652832

@article{ 10.5120/cae2019652832,
author = { Anuradha M. G. Basavaraj L. },
title = { FPGA Implementation of Forgy’s K-Means Clustering for Real Time Image Analysis },
journal = { Communications on Applied Electronics },
issue_date = { Aug 2019 },
volume = { 7 },
number = { 30 },
month = { Aug },
year = { 2019 },
issn = { 2394-4714 },
pages = { 5-10 },
numpages = {9},
url = { https://www.caeaccess.org/archives/volume7/number30/857-2019652832/ },
doi = { 10.5120/cae2019652832 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2023-09-04T20:02:35.033619+05:30
%A Anuradha M. G. Basavaraj L.
%T FPGA Implementation of Forgy’s K-Means Clustering for Real Time Image Analysis
%J Communications on Applied Electronics
%@ 2394-4714
%V 7
%N 30
%P 5-10
%D 2019
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Partitioning the image into meaningful groups is one of the major task in image analysis which can be achieved using the unsupervised clustering algorithm. K-means algorithm is one of the popular unsupervised clustering algorithm. The K-means algorithm is time-consuming and requires intensive computation for a large data set as the input is compared with all the centroids. Also, the data needs to be stored internally due to iterative re-assignment process. An architecture to enhance the speed of clustering operation using minimal hardware for K-means clustering without any internal storage is proposed and implemented using Virtex 6 FPGA. A new methodology is proposed to reduce the distance computation. The performance of the architecture is 203fps for a grayscale image size of 256X256 and 102fps for a grayscale image of size 512X512. This shows that the proposed architecture can be used for real time image segmentation.

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Index Terms

Computer Science
Information Sciences

Keywords

Clustering FPGA Image segmentation K-Means Machine learning.

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