This work aims at analysing leakage power and its variability of CMOS and FinFET inverter chain at 32-nm technology node. This paper also analyses other design metrics like propagation delay, power-delay product (PDP) and energy-delay product (EDP) of CMOS based inverter and FinFET based inverter. FinFET based inverter design achieves 1. 58× (1. 32×), 10. 03×, 4. 71× 5. 11× improvement in leakage power (its variability), propagation delay, PDP and EDP respectively compared to its CMOS based inverter. In this analysis the FinFET based inverter is found to be suitable for ultra-low power applications like portable and wearable devices.

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Leakage Power variability; power-delay product (PDP); energy-delay product (EDP); ultralow-power design.